__ _ _ _ _ . . . .
|__`(_)' ) / \ ' ) |\/| _ . . _ ._ |\/| _ _
| |/ \ { ( / ) / | ||_)|V|/ \| `| | | |'_|| \
|__|\_/._) \_/ /__ | ||_,|||\_/| |_| | |(_||_/
._| |
A. Runtime Memory Configuration
16 bits
16M ffffff .--------------------------------------------------.
| | \
| Test input 1M x 16 | |
| | |
| | |
14M e00000 |--------------------------------------------------| | CS3 4M
| | |
| Test output 1M x 16 | |
| | |
| | /
12M c00000 |--------------------------------------------------|
| | \
| Flash 2M x 16 | |
| (word-writable only) | |
| | |
10M a00000 | | | CS0 4M
| | |
| | |
| | |
840000 | EPROM 128k x 16 | |
| | /
8M 800000 |--------------------------------------------------|
7c0000 | Xilinx data 256k x 16 | \ \
780000 | I/O Xilinx configuration 256k x 8 | | | CS1
700000 | DSP data & program 2 x 128k x 16 | | | 2M
| Ether,I8255,LCD,On-Chip Mem.,DualPort-RAM | | /
6M 600000 |--------------------------------------------------| |
| SIMM 3M x 16 | |
| | |
| | |
| | |
4M 400000 | | |
| | | CS2
| | | 8M
| | | (6M)
| | |
2M 200000 | | |
| | |
| | |
| | |
| | /
0M 000000 `--------------------------------------------------'
Note: This is the memory configuration after startup.
. _ . . . .
| / / \ |\/| _ . . _ ._ |\/| _ _
| / ( ) | ||_)|V|/ \| `| | | |'_|| \
|/ \_/ | ||_,|||\_/| |_| | |(_||_/
._| |
A A A
2 1 1
0 9 8
_____ _________________________________________________________________
| | | |
| | | |
| | | |
| | | |
| | | |
| | | 512k 0x780000 Xilinx Data 256k x 16 |
| |1| |
| | | |
| | | |
| | | |
| | | |
| | | |
| | |_________________________________________________________________|
1| 1M | _________________________________________________________________
| | | |
| | | |
| | | |
| | | |
| | | |
| | | 512k 0x700000 Xilinx Conf 256k x 16 (only LSB used) |
| |0| (not currently usable) |
| | | |
| | | |
| | | |
| | | |
| | | |
|_____| |_________________________________________________________________|
_____ _____ _________________________________________________________
| | | | | |
| | | | | 128k 0x6e0000 DSP2 program (only word-writable) |
| | | |1|_________________________________________________________|
| | | | | |
| | | | | 128k 0x6c0000 DSP2 data (only word-writable) |
| | | 512 | |_________________________________________________________|
| |1| k | _________________________________________________________
| | | | | |
| | | | | 128k 0x6a0000 DSP1 program (only word-writable) |
| | | |0|_________________________________________________________|
| | | | | |
| | | | | 128k 0x680000 DSP1 data (only word-writable) |
| | |_____| |_________________________________________________________|
0| 1M | _____ _________________________________________________________
| | | | | |
| | | | | 128k 0x660000 Dual-Port RAM (only word-writable) |
| | | |1|_________________________________________________________|
| | | | | 4k 0x650000 On-Chip Memory Locations |
| | | | | 128k 0x640000 LCD (9 LSbits used) (450ns!) |
| | | 512 | |_________________________________________________________|
| |0| k | _________________________________________________________
| | | | | 128k 0x620000 I8255 (only LSB used) (150ns) |
| | | | | |
| | | |0|_________________________________________________________|
| | | | | 128k 0x600000 Ethernet Controller |
| | | | | |
|_____| |_____| |_________________________________________________________|
B. Power-On Memory Configuration
16 bits
16M ffffff .--------------------------------------------------.
| |
| OPEN |
| |
| |
| |
| |
: : : : : : : : : : : : : : : : : :
| |
|--------------------------------------------------| \
8k 002000 | EPROM 128k x 16 (4k x 16) | | CS0 8k
0M 000000 `--------------------------------------------------' /
Note: This is the poweron memory configuration. The initial
exception vectors are in the EPROM memory. CS0 is initialized
by the processor to 0-8k, Supervisor Program Space, read only.